; generated by Component: ARM Compiler 5.05 update 2 (build 169) Tool: ArmCC [4d0f38]
; commandline ArmCC [--list --debug -c --asm --interleave -o.\obj\main.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\main.d --cpu=Cortex-M4.fp --apcs=interwork -O0 --diag_suppress=9931 -I..\..\..\Library\CMSIS\Include -I..\..\..\Library\Device\Nuvoton\M451Series\Include -I..\..\..\Library\StdDriver\inc -I..\Bsp -I..\User -I..\lcd_driver -I..\exti_driver -I..\led_driver -I..\touch -I..\dotmatix_lcd -I..\KH -ID:\\A\LCD\͹ϵ_VKL\VKL\VKL060_TESTCODE\project\VKL060_FUNC\Keil\RTE -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\4.3.0\CMSIS\Include -D__UVISION_VERSION=515 -D_RTE_ --omf_browse=.\obj\main.crf ..\User\main.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  I2C0_IRQHandler PROC
;;;41     /*---------------------------------------------------------------------------------------------------------*/
;;;42     void I2C0_IRQHandler(void)
000000  b510              PUSH     {r4,lr}
;;;43     {
;;;44         unsigned int status;
;;;45     
;;;46         status = I2C_GET_STATUS(I2C0);
000002  48e8              LDR      r0,|L1.932|
000004  68c4              LDR      r4,[r0,#0xc]
;;;47         if(I2C_GET_TIMEOUT_FLAG(I2C0))
000006  6940              LDR      r0,[r0,#0x14]
000008  f0000001          AND      r0,r0,#1
00000c  b118              CBZ      r0,|L1.22|
;;;48         {
;;;49             /* Clear I2C0 Timeout Flag */
;;;50             I2C_ClearTimeoutFlag(I2C0);
00000e  48e5              LDR      r0,|L1.932|
000010  f7fffffe          BL       I2C_ClearTimeoutFlag
000014  e006              B        |L1.36|
                  |L1.22|
;;;51         }
;;;52         else
;;;53         {
;;;54             if(i2c0handlerflag != NULL)
000016  48e4              LDR      r0,|L1.936|
000018  6800              LDR      r0,[r0,#0]  ; i2c0handlerflag
00001a  b118              CBZ      r0,|L1.36|
;;;55                 i2c0handlerflag(status);
00001c  4620              MOV      r0,r4
00001e  49e2              LDR      r1,|L1.936|
000020  6809              LDR      r1,[r1,#0]  ; i2c0handlerflag
000022  4788              BLX      r1
                  |L1.36|
;;;56         }
;;;57     }
000024  bd10              POP      {r4,pc}
;;;58     
                          ENDP

                  I2C_MasterRx PROC
;;;61     /*---------------------------------------------------------------------------------------------------------*/
;;;62     void I2C_MasterRx(unsigned int rxstatus)
000026  b510              PUSH     {r4,lr}
;;;63     {
000028  4604              MOV      r4,r0
;;;64         if(rxstatus == 0x08)                       /* START has been transmitted and prepare SLA+W */
00002a  2c08              CMP      r4,#8
00002c  d10a              BNE      |L1.68|
;;;65         {
;;;66             I2C_SET_DATA(I2C0, (VKL060_ADDR << 1));    /* Write SLA+W to Register I2CDAT */
00002e  207c              MOVS     r0,#0x7c
000030  49dc              LDR      r1,|L1.932|
000032  6088              STR      r0,[r1,#8]
;;;67     				I2C_SET_CONTROL_REG(I2C0, I2C_CTL_SI);	//͵ַдbitACK
000034  4608              MOV      r0,r1
000036  6800              LDR      r0,[r0,#0]
000038  f020003c          BIC      r0,r0,#0x3c
00003c  f0400008          ORR      r0,r0,#8
000040  6008              STR      r0,[r1,#0]
000042  e051              B        |L1.232|
                  |L1.68|
;;;68         }
;;;69         else if(rxstatus == 0x18)                  /* SLA+W has been transmitted and ACK has been received */
000044  2c18              CMP      r4,#0x18
000046  d10b              BNE      |L1.96|
;;;70         {
;;;71     				I2C_SET_DATA(I2C0, i2crdtx);
000048  48d8              LDR      r0,|L1.940|
00004a  7800              LDRB     r0,[r0,#0]  ; i2crdtx
00004c  49d5              LDR      r1,|L1.932|
00004e  6088              STR      r0,[r1,#8]
;;;72     				I2C_SET_CONTROL_REG(I2C0, I2C_CTL_SI);	//ݣACK
000050  4608              MOV      r0,r1
000052  6800              LDR      r0,[r0,#0]
000054  f020003c          BIC      r0,r0,#0x3c
000058  f0400008          ORR      r0,r0,#8
00005c  6008              STR      r0,[r1,#0]
00005e  e043              B        |L1.232|
                  |L1.96|
;;;73         }
;;;74         else if(rxstatus == 0x20)                  /* SLA+W has been transmitted and NACK has been received */
000060  2c20              CMP      r4,#0x20
000062  d10b              BNE      |L1.124|
;;;75         {
;;;76             I2C_STOP(I2C0);
000064  48cf              LDR      r0,|L1.932|
000066  f7fffffe          BL       I2C_STOP
;;;77             I2C_START(I2C0);
00006a  48ce              LDR      r0,|L1.932|
00006c  6800              LDR      r0,[r0,#0]
00006e  f0200008          BIC      r0,r0,#8
000072  f0400020          ORR      r0,r0,#0x20
000076  49cb              LDR      r1,|L1.932|
000078  6008              STR      r0,[r1,#0]
00007a  e035              B        |L1.232|
                  |L1.124|
;;;78         }
;;;79         else if(rxstatus == 0x28)                  /* DATA has been transmitted and ACK has been received */
00007c  2c28              CMP      r4,#0x28
00007e  d108              BNE      |L1.146|
;;;80         {
;;;81             I2C_SET_CONTROL_REG(I2C0, I2C_CTL_STA_SI);  //ݡSR START
000080  48c8              LDR      r0,|L1.932|
000082  6800              LDR      r0,[r0,#0]
000084  f020003c          BIC      r0,r0,#0x3c
000088  f0400028          ORR      r0,r0,#0x28
00008c  49c5              LDR      r1,|L1.932|
00008e  6008              STR      r0,[r1,#0]
000090  e02a              B        |L1.232|
                  |L1.146|
;;;82         }
;;;83         else if(rxstatus == 0x10)                  /* Repeat START has been transmitted and prepare SLA+R */
000092  2c10              CMP      r4,#0x10
000094  d10a              BNE      |L1.172|
;;;84         {
;;;85             I2C_SET_DATA(I2C0, ((VKL060_ADDR << 1) | 0x01));   /* Write SLA+R to Register I2CDAT */
000096  207d              MOVS     r0,#0x7d
000098  49c2              LDR      r1,|L1.932|
00009a  6088              STR      r0,[r1,#8]
;;;86     			I2C_SET_CONTROL_REG(I2C0, I2C_CTL_SI);	//͵ַbitACK
00009c  4608              MOV      r0,r1
00009e  6800              LDR      r0,[r0,#0]
0000a0  f020003c          BIC      r0,r0,#0x3c
0000a4  f0400008          ORR      r0,r0,#8
0000a8  6008              STR      r0,[r1,#0]
0000aa  e01d              B        |L1.232|
                  |L1.172|
;;;87         }
;;;88         else if(rxstatus == 0x40)                  /* SLA+R has been transmitted and ACK has been received */
0000ac  2c40              CMP      r4,#0x40
0000ae  d108              BNE      |L1.194|
;;;89         {
;;;90             I2C_SET_CONTROL_REG(I2C0, I2C_CTL_SI);
0000b0  48bc              LDR      r0,|L1.932|
0000b2  6800              LDR      r0,[r0,#0]
0000b4  f020003c          BIC      r0,r0,#0x3c
0000b8  f0400008          ORR      r0,r0,#8
0000bc  49b9              LDR      r1,|L1.932|
0000be  6008              STR      r0,[r1,#0]
0000c0  e012              B        |L1.232|
                  |L1.194|
;;;91         }
;;;92         else if(rxstatus == 0x58)                  /* DATA has been received and NACK has been returned */
0000c2  2c58              CMP      r4,#0x58
0000c4  d10f              BNE      |L1.230|
;;;93         {
;;;94     			i2crdrx = (unsigned char) I2C_GET_DATA(I2C0);
0000c6  48b7              LDR      r0,|L1.932|
0000c8  6880              LDR      r0,[r0,#8]
0000ca  49b9              LDR      r1,|L1.944|
0000cc  7008              STRB     r0,[r1,#0]
;;;95     			I2C_SET_CONTROL_REG(I2C0, I2C_CTL_STO_SI); //STOP
0000ce  48b5              LDR      r0,|L1.932|
0000d0  6800              LDR      r0,[r0,#0]
0000d2  f020003c          BIC      r0,r0,#0x3c
0000d6  f0400018          ORR      r0,r0,#0x18
0000da  49b2              LDR      r1,|L1.932|
0000dc  6008              STR      r0,[r1,#0]
;;;96     			endflag = 1;
0000de  2001              MOVS     r0,#1
0000e0  49b4              LDR      r1,|L1.948|
0000e2  7008              STRB     r0,[r1,#0]
0000e4  e000              B        |L1.232|
                  |L1.230|
;;;97         } 
;;;98         else
;;;99         {
;;;100            /* TO DO */
;;;101            //rxstatusis NOT processed
;;;102    			__nop();
0000e6  bf00              NOP      
                  |L1.232|
;;;103        }
;;;104    }
0000e8  bd10              POP      {r4,pc}
;;;105    /*---------------------------------------------------------------------------------------------------------*/
                          ENDP

                  I2C_MasterTx PROC
;;;107    /*---------------------------------------------------------------------------------------------------------*/
;;;108    void I2C_MasterTx(unsigned int txstatus)
0000ea  b510              PUSH     {r4,lr}
;;;109    {
0000ec  4604              MOV      r4,r0
;;;110        if(txstatus == 0x08)                       /* START has been transmitted */
0000ee  2c08              CMP      r4,#8
0000f0  d10a              BNE      |L1.264|
;;;111        {
;;;112            I2C_SET_DATA(I2C0, VKL060_ADDR << 1);    /* Write SLA+W to Register I2CDAT */
0000f2  207c              MOVS     r0,#0x7c
0000f4  49ab              LDR      r1,|L1.932|
0000f6  6088              STR      r0,[r1,#8]
;;;113            I2C_SET_CONTROL_REG(I2C0, I2C_CTL_SI);
0000f8  4608              MOV      r0,r1
0000fa  6800              LDR      r0,[r0,#0]
0000fc  f020003c          BIC      r0,r0,#0x3c
000100  f0400008          ORR      r0,r0,#8
000104  6008              STR      r0,[r1,#0]
000106  e048              B        |L1.410|
                  |L1.264|
;;;114        }
;;;115        else if(txstatus == 0x18)                  /* SLA+W has been transmitted and ACK has been received */
000108  2c18              CMP      r4,#0x18
00010a  d111              BNE      |L1.304|
;;;116        {
;;;117            I2C_SET_DATA(I2C0, i2cwrbuf[txcnt++]);
00010c  48aa              LDR      r0,|L1.952|
00010e  7801              LDRB     r1,[r0,#0]  ; txcnt
000110  7800              LDRB     r0,[r0,#0]  ; txcnt
000112  1c40              ADDS     r0,r0,#1
000114  4aa8              LDR      r2,|L1.952|
000116  7010              STRB     r0,[r2,#0]
000118  48a8              LDR      r0,|L1.956|
00011a  5c40              LDRB     r0,[r0,r1]
00011c  49a1              LDR      r1,|L1.932|
00011e  6088              STR      r0,[r1,#8]
;;;118            I2C_SET_CONTROL_REG(I2C0, I2C_CTL_SI);
000120  4608              MOV      r0,r1
000122  6800              LDR      r0,[r0,#0]
000124  f020003c          BIC      r0,r0,#0x3c
000128  f0400008          ORR      r0,r0,#8
00012c  6008              STR      r0,[r1,#0]
00012e  e034              B        |L1.410|
                  |L1.304|
;;;119        }
;;;120        else if(txstatus == 0x20)                  /* SLA+W has been transmitted and NACK has been received */
000130  2c20              CMP      r4,#0x20
000132  d10b              BNE      |L1.332|
;;;121        {
;;;122            I2C_STOP(I2C0);
000134  489b              LDR      r0,|L1.932|
000136  f7fffffe          BL       I2C_STOP
;;;123            I2C_START(I2C0);
00013a  489a              LDR      r0,|L1.932|
00013c  6800              LDR      r0,[r0,#0]
00013e  f0200008          BIC      r0,r0,#8
000142  f0400020          ORR      r0,r0,#0x20
000146  4997              LDR      r1,|L1.932|
000148  6008              STR      r0,[r1,#0]
00014a  e026              B        |L1.410|
                  |L1.332|
;;;124        }
;;;125        else if(txstatus == 0x28)                  /* DATA has been transmitted and ACK has been received */
00014c  2c28              CMP      r4,#0x28
00014e  d123              BNE      |L1.408|
;;;126        {
;;;127            if(txcnt != txlen)
000150  4899              LDR      r0,|L1.952|
000152  7800              LDRB     r0,[r0,#0]  ; txcnt
000154  499a              LDR      r1,|L1.960|
000156  7809              LDRB     r1,[r1,#0]  ; txlen
000158  4288              CMP      r0,r1
00015a  d011              BEQ      |L1.384|
;;;128            {
;;;129                I2C_SET_DATA(I2C0, i2cwrbuf[txcnt++]);
00015c  4896              LDR      r0,|L1.952|
00015e  7801              LDRB     r1,[r0,#0]  ; txcnt
000160  7800              LDRB     r0,[r0,#0]  ; txcnt
000162  1c40              ADDS     r0,r0,#1
000164  4a94              LDR      r2,|L1.952|
000166  7010              STRB     r0,[r2,#0]
000168  4894              LDR      r0,|L1.956|
00016a  5c40              LDRB     r0,[r0,r1]
00016c  498d              LDR      r1,|L1.932|
00016e  6088              STR      r0,[r1,#8]
;;;130                I2C_SET_CONTROL_REG(I2C0, I2C_CTL_SI);
000170  4608              MOV      r0,r1
000172  6800              LDR      r0,[r0,#0]
000174  f020003c          BIC      r0,r0,#0x3c
000178  f0400008          ORR      r0,r0,#8
00017c  6008              STR      r0,[r1,#0]
00017e  e00c              B        |L1.410|
                  |L1.384|
;;;131            }
;;;132            else
;;;133            {
;;;134                I2C_SET_CONTROL_REG(I2C0, I2C_CTL_STO_SI);
000180  4888              LDR      r0,|L1.932|
000182  6800              LDR      r0,[r0,#0]
000184  f020003c          BIC      r0,r0,#0x3c
000188  f0400018          ORR      r0,r0,#0x18
00018c  4985              LDR      r1,|L1.932|
00018e  6008              STR      r0,[r1,#0]
;;;135                endflag = 1;
000190  2001              MOVS     r0,#1
000192  4988              LDR      r1,|L1.948|
000194  7008              STRB     r0,[r1,#0]
000196  e000              B        |L1.410|
                  |L1.408|
;;;136            }
;;;137        }
;;;138        else
;;;139        {
;;;140           /* TO DO */
;;;141          //txstatus is NOT processed
;;;142    			__nop();
000198  bf00              NOP      
                  |L1.410|
;;;143        }
;;;144    }
00019a  bd10              POP      {r4,pc}
;;;145    /*******************************************************************************
                          ENDP

                  loopshift_left8 PROC
;;;151    *******************************************************************************/
;;;152    unsigned char loopshift_left8(unsigned char dat)
00019c  b510              PUSH     {r4,lr}
;;;153    {
00019e  4601              MOV      r1,r0
;;;154    	unsigned char i,retval,datval;
;;;155    	
;;;156    	datval=dat;
0001a0  460a              MOV      r2,r1
;;;157    	retval=0;
0001a2  2000              MOVS     r0,#0
;;;158    	for(i=0;i<8;i++)
0001a4  2300              MOVS     r3,#0
0001a6  e00a              B        |L1.446|
                  |L1.424|
;;;159    	{
;;;160    		retval>>=1;
0001a8  1040              ASRS     r0,r0,#1
;;;161    		if((datval&0x80)==0x80)
0001aa  f0020480          AND      r4,r2,#0x80
0001ae  2c80              CMP      r4,#0x80
0001b0  d101              BNE      |L1.438|
;;;162    			retval|=0x80;
0001b2  f0400080          ORR      r0,r0,#0x80
                  |L1.438|
;;;163    		datval<<=1;
0001b6  0654              LSLS     r4,r2,#25
0001b8  0e22              LSRS     r2,r4,#24
0001ba  1c5c              ADDS     r4,r3,#1              ;158
0001bc  b2e3              UXTB     r3,r4                 ;158
                  |L1.446|
0001be  2b08              CMP      r3,#8                 ;158
0001c0  dbf2              BLT      |L1.424|
;;;164    	}
;;;165    	return retval;
;;;166    }
0001c2  bd10              POP      {r4,pc}
;;;167    /*******************************************************************************
                          ENDP

                  VKL060_I2C_WRDat PROC
;;;173    *******************************************************************************/
;;;174    void VKL060_I2C_WRDat(unsigned char Addr,unsigned char *Databuf,unsigned char cnt)
0001c4  b5f0              PUSH     {r4-r7,lr}
;;;175    {
0001c6  4607              MOV      r7,r0
0001c8  460c              MOV      r4,r1
0001ca  4615              MOV      r5,r2
;;;176    	unsigned char i;                                               
;;;177    	i2cwrbuf[0] = Addr&0x1f;
0001cc  f007001f          AND      r0,r7,#0x1f
0001d0  497a              LDR      r1,|L1.956|
0001d2  7008              STRB     r0,[r1,#0]
;;;178    	for(i=0;i<cnt;i++)
0001d4  2600              MOVS     r6,#0
0001d6  e008              B        |L1.490|
                  |L1.472|
;;;179    	{
;;;180    		i2cwrbuf[1+i] = loopshift_left8(*Databuf++);  //ʾǵλ
0001d8  f8140b01          LDRB     r0,[r4],#1
0001dc  f7fffffe          BL       loopshift_left8
0001e0  1c71              ADDS     r1,r6,#1
0001e2  4a76              LDR      r2,|L1.956|
0001e4  5450              STRB     r0,[r2,r1]
0001e6  1c70              ADDS     r0,r6,#1              ;178
0001e8  b2c6              UXTB     r6,r0                 ;178
                  |L1.490|
0001ea  42ae              CMP      r6,r5                 ;178
0001ec  dbf4              BLT      |L1.472|
;;;181    	}
;;;182    	txcnt = 0;
0001ee  2000              MOVS     r0,#0
0001f0  4971              LDR      r1,|L1.952|
0001f2  7008              STRB     r0,[r1,#0]
;;;183    	txlen=cnt+1; //һλַ+1
0001f4  1c68              ADDS     r0,r5,#1
0001f6  4972              LDR      r1,|L1.960|
0001f8  7008              STRB     r0,[r1,#0]
;;;184    	endflag = 0;
0001fa  2000              MOVS     r0,#0
0001fc  496d              LDR      r1,|L1.948|
0001fe  7008              STRB     r0,[r1,#0]
;;;185    
;;;186    	/* I2C function to write data to slave */
;;;187    	i2c0handlerflag = (I2C_FUNC)I2C_MasterTx;
000200  f2af1019          ADR      r0,I2C_MasterTx + 1
000204  4968              LDR      r1,|L1.936|
000206  6008              STR      r0,[r1,#0]  ; i2c0handlerflag
;;;188    
;;;189    	/* I2C as master sends START signal */
;;;190    	I2C_SET_CONTROL_REG(I2C0, I2C_CTL_STA);
000208  4866              LDR      r0,|L1.932|
00020a  6800              LDR      r0,[r0,#0]
00020c  f020003c          BIC      r0,r0,#0x3c
000210  f0400020          ORR      r0,r0,#0x20
000214  4963              LDR      r1,|L1.932|
000216  6008              STR      r0,[r1,#0]
;;;191    
;;;192    	/* Wait I2C Tx Finish */
;;;193    	while(endflag == 0);
000218  bf00              NOP      
                  |L1.538|
00021a  4866              LDR      r0,|L1.948|
00021c  7800              LDRB     r0,[r0,#0]  ; endflag
00021e  2800              CMP      r0,#0
000220  d0fb              BEQ      |L1.538|
;;;194    	endflag = 0;
000222  2000              MOVS     r0,#0
000224  4963              LDR      r1,|L1.948|
000226  7008              STRB     r0,[r1,#0]
;;;195    }
000228  bdf0              POP      {r4-r7,pc}
;;;196    
                          ENDP

                  VKL060_I2C_RDDat PROC
;;;203    *******************************************************************************/
;;;204    void VKL060_I2C_RDDat(unsigned char Addr,unsigned char *Databuf,unsigned char cnt)
00022a  e92d41f0          PUSH     {r4-r8,lr}
;;;205    {	
00022e  4606              MOV      r6,r0
000230  460d              MOV      r5,r1
000232  4617              MOV      r7,r2
;;;206    	unsigned char i,rxnum;
;;;207    	
;;;208    	rxnum=cnt;
000234  46b8              MOV      r8,r7
;;;209    	for(i=0;i<rxnum;i++)
000236  2400              MOVS     r4,#0
000238  e02f              B        |L1.666|
                  |L1.570|
;;;210    	{
;;;211    		//I2C͵ַ
;;;212    		i2crdtx = (Addr&0x1f)+i;
00023a  f006001f          AND      r0,r6,#0x1f
00023e  4420              ADD      r0,r0,r4
000240  495a              LDR      r1,|L1.940|
000242  7008              STRB     r0,[r1,#0]
;;;213    		txcnt = 0;
000244  2000              MOVS     r0,#0
000246  495c              LDR      r1,|L1.952|
000248  7008              STRB     r0,[r1,#0]
;;;214    		txlen=1;
00024a  2001              MOVS     r0,#1
00024c  495c              LDR      r1,|L1.960|
00024e  7008              STRB     r0,[r1,#0]
;;;215    		endflag = 0;
000250  2000              MOVS     r0,#0
000252  4958              LDR      r1,|L1.948|
000254  7008              STRB     r0,[r1,#0]
;;;216    		//I2C
;;;217    	/* I2C function to read data from slave */
;;;218    		i2c0handlerflag = (I2C_FUNC)I2C_MasterRx;
000256  f2af2031          ADR      r0,I2C_MasterRx + 1
00025a  4953              LDR      r1,|L1.936|
00025c  6008              STR      r0,[r1,#0]  ; i2c0handlerflag
;;;219    
;;;220    		rxcnt = 0;
00025e  2000              MOVS     r0,#0
000260  4958              LDR      r1,|L1.964|
000262  7008              STRB     r0,[r1,#0]
;;;221    		rxlen=1;
000264  2001              MOVS     r0,#1
000266  4958              LDR      r1,|L1.968|
000268  7008              STRB     r0,[r1,#0]
;;;222    
;;;223    		I2C_SET_CONTROL_REG(I2C0, I2C_CTL_STA);
00026a  484e              LDR      r0,|L1.932|
00026c  6800              LDR      r0,[r0,#0]
00026e  f020003c          BIC      r0,r0,#0x3c
000272  f0400020          ORR      r0,r0,#0x20
000276  494b              LDR      r1,|L1.932|
000278  6008              STR      r0,[r1,#0]
;;;224    
;;;225    		/* Wait I2C Rx Finish */
;;;226    		while(endflag == 0);
00027a  bf00              NOP      
                  |L1.636|
00027c  484d              LDR      r0,|L1.948|
00027e  7800              LDRB     r0,[r0,#0]  ; endflag
000280  2800              CMP      r0,#0
000282  d0fb              BEQ      |L1.636|
;;;227    		*Databuf++=loopshift_left8(i2cwrbuf[txlen+i]); //ʾǵλȶ
000284  494e              LDR      r1,|L1.960|
000286  7809              LDRB     r1,[r1,#0]  ; txlen
000288  4421              ADD      r1,r1,r4
00028a  4a4c              LDR      r2,|L1.956|
00028c  5c50              LDRB     r0,[r2,r1]
00028e  f7fffffe          BL       loopshift_left8
000292  f8050b01          STRB     r0,[r5],#1
000296  1c60              ADDS     r0,r4,#1              ;209
000298  b2c4              UXTB     r4,r0                 ;209
                  |L1.666|
00029a  4544              CMP      r4,r8                 ;209
00029c  dbcd              BLT      |L1.570|
;;;228    	}
;;;229    }
00029e  e8bd81f0          POP      {r4-r8,pc}
;;;230    
                          ENDP

                  VKL060_I2C_Cmd PROC
;;;238    *******************************************************************************/
;;;239    void VKL060_I2C_Cmd(unsigned char* cmdbuf,unsigned char cnt)
0002a2  b510              PUSH     {r4,lr}
;;;240    {
;;;241    	unsigned char i;
;;;242    	
;;;243    	for(i=0;i<cnt;i++)
0002a4  2200              MOVS     r2,#0
0002a6  e005              B        |L1.692|
                  |L1.680|
;;;244    	{
;;;245    		i2cwrbuf[i] = *cmdbuf++;
0002a8  f8103b01          LDRB     r3,[r0],#1
0002ac  4c43              LDR      r4,|L1.956|
0002ae  54a3              STRB     r3,[r4,r2]
0002b0  1c53              ADDS     r3,r2,#1              ;243
0002b2  b2da              UXTB     r2,r3                 ;243
                  |L1.692|
0002b4  428a              CMP      r2,r1                 ;243
0002b6  dbf7              BLT      |L1.680|
;;;246    	}
;;;247    	txcnt = 0;
0002b8  2300              MOVS     r3,#0
0002ba  4c3f              LDR      r4,|L1.952|
0002bc  7023              STRB     r3,[r4,#0]
;;;248    	txlen = cnt;
0002be  4b40              LDR      r3,|L1.960|
0002c0  7019              STRB     r1,[r3,#0]
;;;249    	endflag = 0;
0002c2  2300              MOVS     r3,#0
0002c4  4c3b              LDR      r4,|L1.948|
0002c6  7023              STRB     r3,[r4,#0]
;;;250    
;;;251    	/* I2C function to write data to slave */
;;;252    	i2c0handlerflag = (I2C_FUNC)I2C_MasterTx;
0002c8  f2af13e1          ADR      r3,I2C_MasterTx + 1
0002cc  4c36              LDR      r4,|L1.936|
0002ce  6023              STR      r3,[r4,#0]  ; i2c0handlerflag
;;;253    
;;;254    	/* I2C as master sends START signal */
;;;255    	I2C_SET_CONTROL_REG(I2C0, I2C_CTL_STA);
0002d0  4b34              LDR      r3,|L1.932|
0002d2  681b              LDR      r3,[r3,#0]
0002d4  f023033c          BIC      r3,r3,#0x3c
0002d8  f0430320          ORR      r3,r3,#0x20
0002dc  4c31              LDR      r4,|L1.932|
0002de  6023              STR      r3,[r4,#0]
;;;256    
;;;257    	/* Wait I2C Tx Finish */
;;;258    	while(endflag == 0);
0002e0  bf00              NOP      
                  |L1.738|
0002e2  4b34              LDR      r3,|L1.948|
0002e4  781b              LDRB     r3,[r3,#0]  ; endflag
0002e6  2b00              CMP      r3,#0
0002e8  d0fb              BEQ      |L1.738|
;;;259    	endflag = 0;
0002ea  2300              MOVS     r3,#0
0002ec  4c31              LDR      r4,|L1.948|
0002ee  7023              STRB     r3,[r4,#0]
;;;260    
;;;261    }
0002f0  bd10              POP      {r4,pc}
;;;262    /*******************************************************************************
                          ENDP

                  main PROC
;;;268    *******************************************************************************/
;;;269    int main(void)
0002f2  bf00              NOP      
0002f4  bf00              NOP      
0002f6  bf00              NOP      
                  |L1.760|
0002f8  2059              MOVS     r0,#0x59
0002fa  4934              LDR      r1,|L1.972|
0002fc  6008              STR      r0,[r1,#0]
0002fe  2016              MOVS     r0,#0x16
000300  0589              LSLS     r1,r1,#22
000302  f8c10100          STR      r0,[r1,#0x100]
000306  2088              MOVS     r0,#0x88
000308  f8c10100          STR      r0,[r1,#0x100]
00030c  06c0              LSLS     r0,r0,#27
00030e  f8d00100          LDR      r0,[r0,#0x100]
000312  2800              CMP      r0,#0
000314  d0f0              BEQ      |L1.760|
000316  bf00              NOP      
;;;270    {
;;;271    	/* Unlock protected registers */
;;;272    	SYS_UnlockReg();
;;;273    	SYS_Init();
000318  f7fffffe          BL       SYS_Init
;;;274    	/* Lock protected registers */
;;;275    	SYS_LockReg();
00031c  bf00              NOP      
00031e  2000              MOVS     r0,#0
000320  492a              LDR      r1,|L1.972|
000322  6008              STR      r0,[r1,#0]
000324  bf00              NOP      
;;;276    	
;;;277    	//PC15ΪPWMƵ32K
;;;278    	//Set Pwm mode as complementary mode
;;;279    	PWM_ENABLE_COMPLEMENTARY_MODE(PWM1);
000326  482a              LDR      r0,|L1.976|
000328  6840              LDR      r0,[r0,#4]
00032a  f04060e0          ORR      r0,r0,#0x7000000
00032e  4928              LDR      r1,|L1.976|
000330  6048              STR      r0,[r1,#4]
;;;280    	PWM_ConfigOutputChannel(PWM1, 0,32000, 50);//PWMƵ32KHzOSCIʱ
000332  2332              MOVS     r3,#0x32
000334  f44f42fa          MOV      r2,#0x7d00
000338  2100              MOVS     r1,#0
00033a  4825              LDR      r0,|L1.976|
00033c  f7fffffe          BL       PWM_ConfigOutputChannel
;;;281    	// Enable output of PWM1 channel 0
;;;282    	PWM_EnableOutput(PWM1, PWM_CH_0_MASK|PWM_CH_1_MASK);
000340  2103              MOVS     r1,#3
000342  4823              LDR      r0,|L1.976|
000344  f7fffffe          BL       PWM_EnableOutput
;;;283    	PWM_Start(PWM1, 0x1);	
000348  2101              MOVS     r1,#1
00034a  4821              LDR      r0,|L1.976|
00034c  f7fffffe          BL       PWM_Start
;;;284    	
;;;285    	//PD5(SCL),PD4(SDA)ΪӲI2C,Ƶ100khz
;;;286    	/* Open I2C module and set bus clock */
;;;287    	I2C_Open(I2C0, 30000);  //100khz
000350  f2475130          MOV      r1,#0x7530
000354  4813              LDR      r0,|L1.932|
000356  f7fffffe          BL       I2C_Open
;;;288    	/* Set I2C Slave Addresses */
;;;289    	I2C_SetSlaveAddr(I2C0, 0, VKL060_ADDR, 0);   
00035a  2300              MOVS     r3,#0
00035c  223e              MOVS     r2,#0x3e
00035e  4619              MOV      r1,r3
000360  4810              LDR      r0,|L1.932|
000362  f7fffffe          BL       I2C_SetSlaveAddr
;;;290    	/* Enable I2C interrupt */
;;;291    	I2C_EnableInt(I2C0);
000366  480f              LDR      r0,|L1.932|
000368  f7fffffe          BL       I2C_EnableInt
;;;292    	NVIC_EnableIRQ(I2C0_IRQn);
00036c  2026              MOVS     r0,#0x26
00036e  f000021f          AND      r2,r0,#0x1f
000372  2101              MOVS     r1,#1
000374  4091              LSLS     r1,r1,r2
000376  0942              LSRS     r2,r0,#5
000378  0092              LSLS     r2,r2,#2
00037a  f10222e0          ADD      r2,r2,#0xe000e000
00037e  f8c21100          STR      r1,[r2,#0x100]
000382  bf00              NOP      
;;;293    		
;;;294    	VKL060_Main();
000384  f7fffffe          BL       VKL060_Main
;;;295    	
;;;296    	while(1)
000388  bf00              NOP      
                  |L1.906|
00038a  e7fe              B        |L1.906|
;;;297    	{					
;;;298    	}
;;;299    }	
;;;300    /************************END OF FILE****/
                          ENDP

                  I2C_STOP PROC
;;;367     */
;;;368    static __INLINE void I2C_STOP(I2C_T *i2c)
00038c  6801              LDR      r1,[r0,#0]
;;;369    {
;;;370    
;;;371        (i2c)->CTL |= (I2C_CTL_SI_Msk | I2C_CTL_STO_Msk);
00038e  f0410118          ORR      r1,r1,#0x18
000392  6001              STR      r1,[r0,#0]
;;;372        while(i2c->CTL & I2C_CTL_STO_Msk);
000394  bf00              NOP      
                  |L1.918|
000396  6801              LDR      r1,[r0,#0]
000398  f0010110          AND      r1,r1,#0x10
00039c  2900              CMP      r1,#0
00039e  d1fa              BNE      |L1.918|
;;;373    }
0003a0  4770              BX       lr
;;;374    
                          ENDP

0003a2  0000              DCW      0x0000
                  |L1.932|
                          DCD      0x40080000
                  |L1.936|
                          DCD      i2c0handlerflag
                  |L1.940|
                          DCD      i2crdtx
                  |L1.944|
                          DCD      i2crdrx
                  |L1.948|
                          DCD      endflag
                  |L1.952|
                          DCD      txcnt
                  |L1.956|
                          DCD      i2cwrbuf
                  |L1.960|
                          DCD      txlen
                  |L1.964|
                          DCD      rxcnt
                  |L1.968|
                          DCD      rxlen
                  |L1.972|
                          DCD      0x40000100
                  |L1.976|
                          DCD      0x40059000

                          AREA ||.bss||, DATA, NOINIT, ALIGN=0

                  i2cwrbuf
                          %        64

                          AREA ||.data||, DATA, ALIGN=2

                  i2c0handlerflag
                          DCD      0x00000000
                  i2crdtx
000004  00                DCB      0x00
                  i2crdrx
000005  00                DCB      0x00
                  rxdummy
000006  00                DCB      0x00
                  txlen
000007  00                DCB      0x00
                  txcnt
000008  00                DCB      0x00
                  rxlen
000009  00                DCB      0x00
                  rxcnt
00000a  00                DCB      0x00
                  endflag
00000b  00                DCB      0x00

;*** Start embedded assembler ***

#line 1 "..\\User\\main.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___6_main_c_endflag____REV16|
#line 114 "..\\..\\..\\Library\\CMSIS\\Include\\core_cmInstr.h"
|__asm___6_main_c_endflag____REV16| PROC
#line 115

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___6_main_c_endflag____REVSH|
#line 128
|__asm___6_main_c_endflag____REVSH| PROC
#line 129

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***

                  __ARM_use_no_argv EQU 0
