; generated by Component: ARM Compiler 5.05 update 2 (build 169) Tool: ArmCC [4d0f38]
; commandline ArmCC [--list --debug -c --asm --interleave -o.\obj\timer.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\timer.d --cpu=Cortex-M4.fp --apcs=interwork -O0 --diag_suppress=9931 -I..\..\..\Library\CMSIS\Include -I..\..\..\Library\Device\Nuvoton\M451Series\Include -I..\..\..\Library\StdDriver\inc -I..\Bsp -I..\User -I..\lcd_driver -I..\exti_driver -I..\led_driver -I..\touch -I..\dotmatix_lcd -I..\KH -ID:\\A\LCD\͹ϵ_VKL\VKL\VKL060_TESTCODE\project\VKL060_FUNC\Keil\RTE -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\4.3.0\CMSIS\Include -D__UVISION_VERSION=515 -D_RTE_ --omf_browse=.\obj\timer.crf ..\..\..\Library\StdDriver\src\timer.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  TIMER_GetModuleClock PROC
;;;263      */
;;;264    unsigned int TIMER_GetModuleClock(TIMER_T *timer)
000000  b530              PUSH     {r4,r5,lr}
;;;265    {
000002  b089              SUB      sp,sp,#0x24
000004  4605              MOV      r5,r0
;;;266        unsigned int u32Src;
;;;267        const unsigned int au32Clk[] = {__HXT, __LXT, 0, 0, 0, __LIRC, 0, __HIRC};
000006  2220              MOVS     r2,#0x20
000008  4976              LDR      r1,|L1.484|
00000a  a801              ADD      r0,sp,#4
00000c  f7fffffe          BL       __aeabi_memcpy4
;;;268    
;;;269        if(timer == TIMER0)
000010  4875              LDR      r0,|L1.488|
000012  4285              CMP      r5,r0
000014  d104              BNE      |L1.32|
;;;270            u32Src = (CLK->CLKSEL1 & CLK_CLKSEL1_TMR0SEL_Msk) >> CLK_CLKSEL1_TMR0SEL_Pos;
000016  4875              LDR      r0,|L1.492|
000018  6800              LDR      r0,[r0,#0]
00001a  f3c02402          UBFX     r4,r0,#8,#3
00001e  e014              B        |L1.74|
                  |L1.32|
;;;271        else if(timer == TIMER1)
000020  4871              LDR      r0,|L1.488|
000022  3020              ADDS     r0,r0,#0x20
000024  4285              CMP      r5,r0
000026  d104              BNE      |L1.50|
;;;272            u32Src = (CLK->CLKSEL1 & CLK_CLKSEL1_TMR1SEL_Msk) >> CLK_CLKSEL1_TMR1SEL_Pos;
000028  4870              LDR      r0,|L1.492|
00002a  6800              LDR      r0,[r0,#0]
00002c  f3c03402          UBFX     r4,r0,#12,#3
000030  e00b              B        |L1.74|
                  |L1.50|
;;;273        else if(timer == TIMER2)
000032  486f              LDR      r0,|L1.496|
000034  4285              CMP      r5,r0
000036  d104              BNE      |L1.66|
;;;274            u32Src = (CLK->CLKSEL1 & CLK_CLKSEL1_TMR2SEL_Msk) >> CLK_CLKSEL1_TMR2SEL_Pos;
000038  486c              LDR      r0,|L1.492|
00003a  6800              LDR      r0,[r0,#0]
00003c  f3c04402          UBFX     r4,r0,#16,#3
000040  e003              B        |L1.74|
                  |L1.66|
;;;275        else  // Timer 3
;;;276            u32Src = (CLK->CLKSEL1 & CLK_CLKSEL1_TMR3SEL_Msk) >> CLK_CLKSEL1_TMR3SEL_Pos;
000042  486a              LDR      r0,|L1.492|
000044  6800              LDR      r0,[r0,#0]
000046  f3c05402          UBFX     r4,r0,#20,#3
                  |L1.74|
;;;277    
;;;278        if(u32Src == 2)
00004a  2c02              CMP      r4,#2
00004c  d103              BNE      |L1.86|
;;;279        {
;;;280            return (SystemCoreClock);
00004e  4869              LDR      r0,|L1.500|
000050  6800              LDR      r0,[r0,#0]  ; SystemCoreClock
                  |L1.82|
;;;281        }
;;;282    
;;;283        return (au32Clk[u32Src]);
;;;284    }
000052  b009              ADD      sp,sp,#0x24
000054  bd30              POP      {r4,r5,pc}
                  |L1.86|
000056  a801              ADD      r0,sp,#4              ;283
000058  f8500024          LDR      r0,[r0,r4,LSL #2]     ;283
00005c  e7f9              B        |L1.82|
;;;285    
                          ENDP

                  TIMER_Open PROC
;;;43       */
;;;44     unsigned int TIMER_Open(TIMER_T *timer, unsigned int u32Mode, unsigned int u32Freq)
00005e  e92d47f0          PUSH     {r4-r10,lr}
;;;45     {
000062  4605              MOV      r5,r0
000064  460f              MOV      r7,r1
000066  4616              MOV      r6,r2
;;;46         unsigned int u32Clk = TIMER_GetModuleClock(timer);
000068  4628              MOV      r0,r5
00006a  f7fffffe          BL       TIMER_GetModuleClock
00006e  4604              MOV      r4,r0
;;;47         unsigned int u32Cmpr = 0, u32Prescale = 0;
000070  f04f0800          MOV      r8,#0
000074  46c1              MOV      r9,r8
;;;48     
;;;49         // Fastest possible timer working freq is (u32Clk / 2). While cmpr = 2, pre-scale = 0.
;;;50         if(u32Freq > (u32Clk / 2))
000076  ebb60f54          CMP      r6,r4,LSR #1
00007a  d902              BLS      |L1.130|
;;;51         {
;;;52             u32Cmpr = 2;
00007c  f04f0802          MOV      r8,#2
000080  e015              B        |L1.174|
                  |L1.130|
;;;53         }
;;;54         else
;;;55         {
;;;56             if(u32Clk > 64000000)
000082  485d              LDR      r0,|L1.504|
000084  4284              CMP      r4,r0
000086  d903              BLS      |L1.144|
;;;57             {
;;;58                 u32Prescale = 7;    // real prescaler value is 8
000088  f04f0907          MOV      r9,#7
;;;59                 u32Clk >>= 3;
00008c  08e4              LSRS     r4,r4,#3
00008e  e00c              B        |L1.170|
                  |L1.144|
;;;60             }
;;;61             else if(u32Clk > 32000000)
000090  485a              LDR      r0,|L1.508|
000092  4284              CMP      r4,r0
000094  d903              BLS      |L1.158|
;;;62             {
;;;63                 u32Prescale = 3;    // real prescaler value is 4
000096  f04f0903          MOV      r9,#3
;;;64                 u32Clk >>= 2;
00009a  08a4              LSRS     r4,r4,#2
00009c  e005              B        |L1.170|
                  |L1.158|
;;;65             }
;;;66             else if(u32Clk > 16000000)
00009e  4858              LDR      r0,|L1.512|
0000a0  4284              CMP      r4,r0
0000a2  d902              BLS      |L1.170|
;;;67             {
;;;68                 u32Prescale = 1;    // real prescaler value is 2
0000a4  f04f0901          MOV      r9,#1
;;;69                 u32Clk >>= 1;
0000a8  0864              LSRS     r4,r4,#1
                  |L1.170|
;;;70             }
;;;71     
;;;72             u32Cmpr = u32Clk / u32Freq;
0000aa  fbb4f8f6          UDIV     r8,r4,r6
                  |L1.174|
;;;73         }
;;;74     
;;;75         timer->CTL = u32Mode | u32Prescale;
0000ae  ea470009          ORR      r0,r7,r9
0000b2  6028              STR      r0,[r5,#0]
;;;76         timer->CMP = u32Cmpr;
0000b4  f8c58004          STR      r8,[r5,#4]
;;;77     
;;;78         return(u32Clk / (u32Cmpr * (u32Prescale + 1)));
0000b8  f1090001          ADD      r0,r9,#1
0000bc  fb08f000          MUL      r0,r8,r0
0000c0  fbb4f0f0          UDIV     r0,r4,r0
;;;79     }
0000c4  e8bd87f0          POP      {r4-r10,pc}
;;;80     
                          ENDP

                  TIMER_Close PROC
;;;89       */
;;;90     void TIMER_Close(TIMER_T *timer)
0000c8  2100              MOVS     r1,#0
;;;91     {
;;;92         timer->CTL = 0;
0000ca  6001              STR      r1,[r0,#0]
;;;93         timer->EXTCTL = 0;
0000cc  6141              STR      r1,[r0,#0x14]
;;;94     }
0000ce  4770              BX       lr
;;;95     
                          ENDP

                  TIMER_Delay PROC
;;;107      */
;;;108    void TIMER_Delay(TIMER_T *timer, unsigned int u32Usec)
0000d0  e92d47f0          PUSH     {r4-r10,lr}
;;;109    {
0000d4  4606              MOV      r6,r0
0000d6  460d              MOV      r5,r1
;;;110        unsigned int u32Clk = TIMER_GetModuleClock(timer);
0000d8  4630              MOV      r0,r6
0000da  f7fffffe          BL       TIMER_GetModuleClock
0000de  4604              MOV      r4,r0
;;;111        unsigned int u32Prescale = 0, delay = (SystemCoreClock / u32Clk) + 1;
0000e0  f04f0900          MOV      r9,#0
0000e4  4843              LDR      r0,|L1.500|
0000e6  6800              LDR      r0,[r0,#0]  ; SystemCoreClock
0000e8  fbb0f0f4          UDIV     r0,r0,r4
0000ec  f1000a01          ADD      r10,r0,#1
;;;112        unsigned int u32Cmpr, u32NsecPerTick;
;;;113    
;;;114        // Clear current timer configuration/
;;;115        timer->CTL = 0;
0000f0  2000              MOVS     r0,#0
0000f2  6030              STR      r0,[r6,#0]
;;;116        timer->EXTCTL = 0;
0000f4  6170              STR      r0,[r6,#0x14]
;;;117    
;;;118        if(u32Clk <= 1000000)    // min delay is 1000 us if timer clock source is <= 1 MHz
0000f6  4843              LDR      r0,|L1.516|
0000f8  4284              CMP      r4,r0
0000fa  d809              BHI      |L1.272|
;;;119        {
;;;120            if(u32Usec < 1000)
0000fc  f5b57f7a          CMP      r5,#0x3e8
000100  d201              BCS      |L1.262|
;;;121                u32Usec = 1000;
000102  f44f757a          MOV      r5,#0x3e8
                  |L1.262|
;;;122            if(u32Usec > 1000000)
000106  483f              LDR      r0,|L1.516|
000108  4285              CMP      r5,r0
00010a  d908              BLS      |L1.286|
;;;123                u32Usec = 1000000;
00010c  4605              MOV      r5,r0
00010e  e006              B        |L1.286|
                  |L1.272|
;;;124        }
;;;125        else
;;;126        {
;;;127            if(u32Usec < 100)
000110  2d64              CMP      r5,#0x64
000112  d200              BCS      |L1.278|
;;;128                u32Usec = 100;
000114  2564              MOVS     r5,#0x64
                  |L1.278|
;;;129            if(u32Usec > 1000000)
000116  483b              LDR      r0,|L1.516|
000118  4285              CMP      r5,r0
00011a  d900              BLS      |L1.286|
;;;130                u32Usec = 1000000;
00011c  4605              MOV      r5,r0
                  |L1.286|
;;;131        }
;;;132    
;;;133        if(u32Clk <= 1000000)
00011e  4839              LDR      r0,|L1.516|
000120  4284              CMP      r4,r0
000122  d80a              BHI      |L1.314|
;;;134        {
;;;135            u32Prescale = 0;
000124  f04f0900          MOV      r9,#0
;;;136            u32NsecPerTick = 1000000000 / u32Clk;
000128  4837              LDR      r0,|L1.520|
00012a  fbb0f8f4          UDIV     r8,r0,r4
;;;137            u32Cmpr = (u32Usec * 1000) / u32NsecPerTick;
00012e  f44f707a          MOV      r0,#0x3e8
000132  4368              MULS     r0,r5,r0
000134  fbb0f7f8          UDIV     r7,r0,r8
000138  e023              B        |L1.386|
                  |L1.314|
;;;138        }
;;;139        else
;;;140        {
;;;141            if(u32Clk > 64000000)
00013a  482f              LDR      r0,|L1.504|
00013c  4284              CMP      r4,r0
00013e  d903              BLS      |L1.328|
;;;142            {
;;;143                u32Prescale = 7;    // real prescaler value is 8
000140  f04f0907          MOV      r9,#7
;;;144                u32Clk >>= 3;
000144  08e4              LSRS     r4,r4,#3
000146  e00c              B        |L1.354|
                  |L1.328|
;;;145            }
;;;146            else if(u32Clk > 32000000)
000148  482c              LDR      r0,|L1.508|
00014a  4284              CMP      r4,r0
00014c  d903              BLS      |L1.342|
;;;147            {
;;;148                u32Prescale = 3;    // real prescaler value is 4
00014e  f04f0903          MOV      r9,#3
;;;149                u32Clk >>= 2;
000152  08a4              LSRS     r4,r4,#2
000154  e005              B        |L1.354|
                  |L1.342|
;;;150            }
;;;151            else if(u32Clk > 16000000)
000156  482a              LDR      r0,|L1.512|
000158  4284              CMP      r4,r0
00015a  d902              BLS      |L1.354|
;;;152            {
;;;153                u32Prescale = 1;    // real prescaler value is 2
00015c  f04f0901          MOV      r9,#1
;;;154                u32Clk >>= 1;
000160  0864              LSRS     r4,r4,#1
                  |L1.354|
;;;155            }
;;;156    
;;;157            if(u32Usec < 250)
000162  2dfa              CMP      r5,#0xfa
000164  d205              BCS      |L1.370|
;;;158            {
;;;159                u32Cmpr = (u32Usec * u32Clk) / 1000000;
000166  fb05f004          MUL      r0,r5,r4
00016a  4926              LDR      r1,|L1.516|
00016c  fbb0f7f1          UDIV     r7,r0,r1
000170  e007              B        |L1.386|
                  |L1.370|
;;;160            }
;;;161            else
;;;162            {
;;;163                u32NsecPerTick = 1000000000 / u32Clk;
000172  4825              LDR      r0,|L1.520|
000174  fbb0f8f4          UDIV     r8,r0,r4
;;;164                u32Cmpr = (u32Usec * 1000) / u32NsecPerTick;
000178  f44f707a          MOV      r0,#0x3e8
00017c  4368              MULS     r0,r5,r0
00017e  fbb0f7f8          UDIV     r7,r0,r8
                  |L1.386|
;;;165            }
;;;166        }
;;;167    
;;;168        timer->CMP = u32Cmpr;
000182  6077              STR      r7,[r6,#4]
;;;169        timer->CTL = TIMER_CTL_CNTEN_Msk | TIMER_ONESHOT_MODE | u32Prescale;
000184  f0494080          ORR      r0,r9,#0x40000000
000188  6030              STR      r0,[r6,#0]
;;;170    
;;;171        // When system clock is faster than timer clock, it is possible timer active bit cannot set in time while we check it.
;;;172        // And the while loop below return immediately, so put a tiny delay here allowing timer start counting and raise active flag.
;;;173        for(; delay > 0; delay--)
00018a  e002              B        |L1.402|
                  |L1.396|
;;;174        {
;;;175            __NOP();
00018c  bf00              NOP      
00018e  f1aa0a01          SUB      r10,r10,#1            ;173
                  |L1.402|
000192  f1ba0f00          CMP      r10,#0                ;173
000196  d1f9              BNE      |L1.396|
;;;176        }
;;;177    
;;;178        while(timer->CTL & TIMER_CTL_ACTSTS_Msk);
000198  bf00              NOP      
                  |L1.410|
00019a  6830              LDR      r0,[r6,#0]
00019c  f0007000          AND      r0,r0,#0x2000000
0001a0  2800              CMP      r0,#0
0001a2  d1fa              BNE      |L1.410|
;;;179    }
0001a4  e8bd87f0          POP      {r4-r10,pc}
;;;180    
                          ENDP

                  TIMER_EnableCapture PROC
;;;198      */
;;;199    void TIMER_EnableCapture(TIMER_T *timer, unsigned int u32CapMode, unsigned int u32Edge)
0001a8  6943              LDR      r3,[r0,#0x14]
;;;200    {
;;;201    
;;;202        timer->EXTCTL = (timer->EXTCTL & ~(TIMER_EXTCTL_CAPFUNCS_Msk | TIMER_EXTCTL_CAPEDGE_Msk)) |
0001aa  f0230316          BIC      r3,r3,#0x16
0001ae  430b              ORRS     r3,r3,r1
0001b0  4313              ORRS     r3,r3,r2
0001b2  f0430308          ORR      r3,r3,#8
0001b6  6143              STR      r3,[r0,#0x14]
;;;203                        u32CapMode | u32Edge | TIMER_EXTCTL_CAPEN_Msk;
;;;204    }
0001b8  4770              BX       lr
;;;205    
                          ENDP

                  TIMER_DisableCapture PROC
;;;214      */
;;;215    void TIMER_DisableCapture(TIMER_T *timer)
0001ba  6941              LDR      r1,[r0,#0x14]
;;;216    {
;;;217        timer->EXTCTL &= ~TIMER_EXTCTL_CAPEN_Msk;
0001bc  f0210108          BIC      r1,r1,#8
0001c0  6141              STR      r1,[r0,#0x14]
;;;218    }
0001c2  4770              BX       lr
;;;219    
                          ENDP

                  TIMER_EnableEventCounter PROC
;;;233      */
;;;234    void TIMER_EnableEventCounter(TIMER_T *timer, unsigned int u32Edge)
0001c4  6942              LDR      r2,[r0,#0x14]
;;;235    {
;;;236        timer->EXTCTL = (timer->EXTCTL & ~TIMER_EXTCTL_CNTPHASE_Msk) | u32Edge;
0001c6  f0220201          BIC      r2,r2,#1
0001ca  430a              ORRS     r2,r2,r1
0001cc  6142              STR      r2,[r0,#0x14]
;;;237        timer->CTL |= TIMER_CTL_EXTCNTEN_Msk;
0001ce  6802              LDR      r2,[r0,#0]
0001d0  f0427280          ORR      r2,r2,#0x1000000
0001d4  6002              STR      r2,[r0,#0]
;;;238    }
0001d6  4770              BX       lr
;;;239    
                          ENDP

                  TIMER_DisableEventCounter PROC
;;;248      */
;;;249    void TIMER_DisableEventCounter(TIMER_T *timer)
0001d8  6801              LDR      r1,[r0,#0]
;;;250    {
;;;251        timer->CTL &= ~TIMER_CTL_EXTCNTEN_Msk;
0001da  f0217180          BIC      r1,r1,#0x1000000
0001de  6001              STR      r1,[r0,#0]
;;;252    }
0001e0  4770              BX       lr
;;;253    
                          ENDP

0001e2  0000              DCW      0x0000
                  |L1.484|
                          DCD      ||.constdata||
                  |L1.488|
                          DCD      0x40050000
                  |L1.492|
                          DCD      0x40000214
                  |L1.496|
                          DCD      0x40051000
                  |L1.500|
                          DCD      SystemCoreClock
                  |L1.504|
                          DCD      0x03d09000
                  |L1.508|
                          DCD      0x01e84800
                  |L1.512|
                          DCD      0x00f42400
                  |L1.516|
                          DCD      0x000f4240
                  |L1.520|
                          DCD      0x3b9aca00

                          AREA ||.constdata||, DATA, READONLY, ALIGN=2

                          DCD      0x00b71b00
                          DCD      0x00008000
                          DCD      0x00000000
                          DCD      0x00000000
                          DCD      0x00000000
                          DCD      0x00002710
                          DCD      0x00000000
                          DCD      0x01518000

;*** Start embedded assembler ***

#line 1 "..\\..\\..\\Library\\StdDriver\\src\\timer.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___7_timer_c_5bec749a____REV16|
#line 114 "..\\..\\..\\Library\\CMSIS\\Include\\core_cmInstr.h"
|__asm___7_timer_c_5bec749a____REV16| PROC
#line 115

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___7_timer_c_5bec749a____REVSH|
#line 128
|__asm___7_timer_c_5bec749a____REVSH| PROC
#line 129

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
